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SeReNo: Service Based Reconfigurable NoC Architecture

SeReNo

The purpose of the SeReNo project is to create a framework for using hardware resource efficiently by using a service based reconfigurable network-on-chip (NoC) architecture. This requires developing several novel techniques to facilitate data routing on the chip, generation of new processing cores when new services are required and also mapping applications and system functions to the new service based architecture. The first hurdle to be surmounted is creating a simulator for the system. The simulator must be highly modular, in order to facilitate various test runs with different design choices. With the data obtained from these high level simulations, the variations in both the system architecture and the application partitioning between software and reconfigured application specific processing cores can be evaluated for a large number of applications. The most suitable model will then be implemented in real hardware using Xilinx FPGAs. The NoC addressing scheme will next be transformed to support service based access to both hardware cores and software modules. This scheme would allow moving certain processing core on the fly, as well as act as the interface to the reconfiguration module. The reconfiguration module would detect calls for processing cores that are not currently implemented on the NoC, and provide a new instance of such a module. Also purging unused modules would be this units duty. Finally some of the processing cores will be modified to support a new paradigm, where the processing core are moved, while the data being processed remains stationary in the local memory of a given reconfigurable block. This paradigm is well suited for data intensive applications with several relatively simple processing steps. As the last objective, a full scale case study will be designed and implemented. The system should include multitude of different applications, including, but not limited to, Java applications, audio and video decoding, protocol processing, encryption and housekeeping functions.