This is an archived copy!

Home Welcome Research Personnel Publications Links Projects

 

MyGoC: myGoogle-on-Chip

Executive summary

The aim of the proposal is to develop the methods and technology necessary to design and implement "myGoogle.on.Chip", a personalized and shareable embedded media storage system with integrated associative search. The system we vision build on the novel solid state technologies currently being developed by the leading industries in Europe. Once the technology is ready, new flash memory devices with enormous capacity, flexibility, and potential for a wide spectrum of applications will be on the market. In particular, we foresee a great demand for convenient mass storage of personal media with efficient search facilities for unstructured content (text, pictures, sound, video) and the possibility of sharing the contents with other people.

This project focuses on building the understanding, know.how, and expertise on how to design and implement innovative software applications exploiting the capabilities of such new devices. The project addresses several key problems that we have to overcome in order to develop successful applications on the basis of the new hardware technology. Fist, we have to develop smarter and more efficient machine learning techniques for information retrieval, preference learning, and ranking for handling associative search queries based on semantic similarity. Here, multi.task learning with semi.supervised methods accompanied by ideas of deep learning will be explored.

Secondly, we have to design software architectures and application interfaces to enable the development of smart applications. To create this kind of software platform, we will have to find manageable and efficient mappings of the complex algorithms onto the massively parallel hardware architecture which take advantage of the dynamically configurable connectivity thereby achieving better qualitative performance while simultaneously maintaining high computational efficiency.

Lastly, we need to address the problems related to actual embedded software implementation of the algorithms to meet the requirements such as achieving manageable power consumption, set by the hardware environment and planned use cases. An energy.aware protocol for distributed query handling is also needed, which is capable of executing background tasks for optimizing both qualitative performance and efficiency as well as continuous personalization through adaptive organization of the content for better overall performance and more satisfying user experience.

Background

The advent of the new Millennium has seen a continuation of the rise of electronic products and services within the field of information technology, powered by innovations in processing and packaging technology maintaining Moore¡¯s law, as well as software technology. These continue to be instrumental in increasing the productivity and effectiveness of industry, and the quality of life of the ordinary person, and contribute to societal improvements in diverse areas such as health, security, and economic wellbeing.

The ¡°ambient intelligence¡± expected phenomenon will define the era of mobile data, and can be achieved only by the integration of massive local storage capacity and by the requisite local memory subsystem massive processing power within a single device with a small and light.weight packaged footprint. A novel integration of hierarchical, distributed and 3.dimensional architecture combining massive amounts of memory and processing power will support the very high capacity data processing requirements for these mobile computing applications, such as data retrieval under vague and human.like search criteria and support of sharing of relevant and individualized information and experiences in social networks.

In this project we do not focus on the core implementation technology, but on new software and system architecture paradigms needed for such embedded systems. More specifically we focus on higher lever interfaces providing device interoperability (e.g. with respect to new usage paradigms such as Microsoft Surface), data management operation such as searching and indexing for heterogeneous unstructured data, and programming models and APIs for highly parallel Network.on.Chip based massively parallel core processors addressing distributed mass storage page, as indicated in pictures above. We believe that the outlined distributed multiprocessor architecture is quite representative for many next generation embedded system applications and is currently having multiple open issues which need to be addressed with more basic research before entering to directed R&D activities e.g. under EU frame programs (such as TP Artemis). In addition, there are multiple new challenges associated to smart solid disk, many of them already addressed by joint industry.academia projects, which are out of scope for this project application.

Objectives

This project focuses on building the understanding, know.how, and expertise on how to design and implement innovative software applications exploiting the capabilities of the new devices. The project addresses several key problems that we have to overcome in order to develop successful applications on the basis of the new hardware technology. Fist, we have to develop smarter and more efficient machine learning techniques for information retrieval, preference learning, and ranking for handling associative search queries based on semantic similarity. Here, multi.task learning with semi.supervised methods accompanied by ideas of deep learning will be explored.

Secondly, we have to design software architectures and application interfaces to enable the development of smart applications. To create this kind of software platform, we will have to find manageable and efficient mappings of the complex algorithms onto the massively parallel hardware architecture which take advantage of the dynamically configurable connectivity thereby achieving better qualitative performance while simultaneously maintaining high computational efficiency.

Lastly, we need to address the problems related to actual embedded software implementation of the algorithms to meet the requirements such as achieving manageable power consumption, set by the hardware environment and planned use cases. An energy.aware protocol for distributed query handling is also needed, which is capable of executing background tasks for optimizing qualitative performance and efficiency as well as continuous personalization through adaptive organization of the content for better overall performance and more satisfying user experience.

Expected research results

The project will provide the grounding papers for smart solid disk drives. Here the key contributions are adding intelligence to smart disk operation including extensive user services. The key contribution is the platform architecture and API concepts for intelligent search operations which can move such technologies closer to reality. Because this project focuses on fundamental concepts and new ideas, the practical implementations and demonstrations with full.scale real smart devices will be the content of a future EU joint industry.academia cooperative project. We have already established international partnerships for such a project, and planning in under way. We hope to get the project started in three years time.

Furthermore we see very interesting new fundamental application which can be based on such devices. Especially the memory processing in parallel and hierarchical manner and with help of multicore Network.on. Chip platform provides unique opportunities to emulate or build hierarchical temporal memory (Hawkins 2004, 2008) with relevant complexity and arbitrary hierarchy (due to NoC communication infrastructure nature based on packet switching instead of circuit switching). It is assumed that hierarchical temporal memory models can explain the behavior of human neocortex and if so, the work proposed here can be a concrete seed to intelligent machines due to inherent processing and hierarchical flexibility of the memory system architecture behind myGoogle.on.Chip project. This is at this stage still speculative (but will be analyzed and refined during this project), but obviously, if this indeed is the case, the follow.up project for this proposal will focus on new breakthroughs in emulation of neocortex and core building blocks for intelligent machines.